The demands of AI, from Cloud to Edge, are reshaping the infrastructure landscape, driving the need for scalable, high-performance, and power-efficient silicon. In this session, Arm and Siemens will present a joint approach to accelerating the design and validation of next-generation infrastructure SoCs using Arm Neoverse Compute Subsystems (CSS) and Siemens Veloce hardware-assisted verification.
We will showcase how Arm’s Neoverse CSS—based on the latest third-generation V- and N-series designs—provides pre-validated, production-ready compute IP that significantly shortens the path to silicon. Coupled with Siemens' Veloce-CS platform, customers can simulate, debug, and validate their full system earlier and with higher fidelity, enabling software bring-up and performance optimization months ahead of traditional methods.
The presentation will feature use cases demonstrating how this collaboration improves time-to-market and reduces integration risks for hyperscale, Telco, and AI-focused SoC designs. Attendees will gain insight into key co-optimization strategies, joint tooling support, and real-world success stories from early adopters.